onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate /tb_topdma_rs_ram/reset
add wave -noupdate /tb_topdma_rs_ram/clk
add wave -noupdate /tb_topdma_rs_ram/rs232_rx
add wave -noupdate /tb_topdma_rs_ram/rs232_tx
add wave -noupdate /tb_topdma_rs_ram/dma_rq
add wave -noupdate /tb_topdma_rs_ram/ready
add wave -noupdate /tb_topdma_rs_ram/dma_ack
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/rs232_rx
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/rs232_tx
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/send_comm
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/dma_rq
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/ready
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/dma_ack
add wave -noupdate -divider RS232
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/clk
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/data_in
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/valid_d
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/ack_in
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/tx_rdy
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/td
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/rd
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/data_out
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/data_read
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/full
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/empty
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/data_ff
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/starttx
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/tx_rdy_i
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/fifo_write
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/linerd_in
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/valid_out
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/code_out
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/sinit
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/rs/fifo_in
add wave -noupdate -divider RAM
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/current_state
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/full_ram/clk
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/full_ram/databus
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/full_ram/address
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/full_ram/write_en
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/full_ram/oe
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/full_ram/reg_ram_s
add wave -noupdate -divider {DMA CONTROLLER}
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/clk
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/rcvd_data
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/rx_full
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/rx_empty
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/data_read
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/tx_rdy
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/ack_out
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/valid_d
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/tx_data
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/write_en
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/oe
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/address
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/databus
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/dma_ack
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/send_comm
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/dma_rq
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/ready
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/rx_counter
add wave -noupdate -radix hexadecimal /tb_topdma_rs_ram/uut/dma_controller/tx_counter
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {813078 ps} 0}
configure wave -namecolwidth 398
configure wave -valuecolwidth 79
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits us
update
WaveRestoreZoom {0 ps} {2755028 ps}
